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AT86RF232
7.1.4.3 PLL_ON and RX_ON States
The transition from TRX_OFF to PLL_ON or RX_ON mode is shown in Figure 7-5 .
Figure 7-5. Transition from TRX_OFF to PLL_ON or RX_ON state.
Event
0
80
IRQ_0 (PLL_LOCK)
Time [μs]
State
Block
TRX_OFF
AVREG
PLL
PLL_ON
RX_ON
RX
Command
Time
PLL_ON
t TR4
RX_ON
t TR8
Notes:
1.
2.
If TRX_CMD = RX_ON in TRX_OFF state RX_ON state is entered immediately,
even if the PLL has not settled.
Timing figures t TR4 and t TR8 refers to Table 7-1 .
In TRX_OFF state, entering the commands PLL_ON or RX_ON initiates a ramp-up
sequence of the internal 1.8V voltage regulator for the analog domain (AVREG).
RX_ON state can be entered any time from PLL_ON state regardless whether the PLL
has already locked, which is indicated by IRQ_0 (PLL_LOCK).
7.1.4.4 BUSY_TX and RX_ON States
The transition from PLL_ON to BUSY_TX state and subsequently to RX_ON state is
shown in Figure 7-6 .
Figure 7-6. PLL_ON to BUSY_TX to RX_ON Timing.
0
16
x
x + 32
Time [μs]
Pin
SLP_TR
State
PLL_ON
BUSY_TX
RX_ON
Block
PLL
PA
PA, TX
PLL
RX
Command
Time
or command TX_START
t TR10
RX_ON
t TR11
Starting from PLL_ON state it is further assumed that the PLL is already locked. A
transmission is initiated either by a rising edge of pin 11 (SLP_TR) or by command
TX_START, the Atmel AT86RF232 changes into BUSY_TX state.
The PLL settles to the transmit frequency and the PA is enabled. t TR10 = 16μs after
initiating the transmission starts the internally generated SHR transmission. After that
the PSDU data are transmitted from the Frame Buffer.
After completing the frame transmission, indicated by IRQ_3 (TRX_END), the PLL
settles back to the receive frequency within t TR11 = 32μs in state PLL_ON.
37
8321A – MCU Wireless – 10/11
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